00000000 W __heap_end 00000000 a __tmp_reg__ 00000000 W __vector_default 00000000 T __vectors 00000001 a __zero_reg__ 0000001c T __ctors_end 0000001c T __ctors_start 0000001c T __dtors_end 0000001c T __dtors_start 0000001c W __init 00000024 T __do_copy_data 00000030 t .do_copy_data_loop 00000036 t .do_copy_data_start 0000003c T __do_clear_bss 0000003d a __SP_L__ 0000003e a __SP_H__ 0000003f a __SREG__ 00000044 t .do_clear_bss_loop 00000046 t .do_clear_bss_start 0000004e T __bad_interrupt 0000004e W __vector_1 0000004e W __vector_10 0000004e W __vector_11 0000004e W __vector_12 0000004e W __vector_13 0000004e W __vector_2 0000004e W __vector_3 0000004e W __vector_4 0000004e W __vector_5 0000004e W __vector_6 0000004e W __vector_7 0000004e W __vector_8 0000004e W __vector_9 00000050 T nop 00000070 T photo 00000082 T port_init 00000092 T uart_init 0000009c T uart_send_str 000000b2 T getDigit 000000d2 T intToStr 000000df W __stack 00000136 T adc_init 0000013c T adc_load 00000156 T main 0000019a T __mulhi3 0000019a t Letext 0000019e t __mulhi3_loop 000001a6 t __mulhi3_skip1 000001b8 t __mulhi3_exit 000001be T __divmodhi4 000001be T _div 000001d2 t __divmodhi4_neg2 000001d8 t __divmodhi4_exit 000001da t __divmodhi4_neg1 000001e4 T __udivmodhi4 000001ec t __udivmodhi4_loop 000001fa t __udivmodhi4_ep 00000210 A __data_load_end 00000210 A __data_load_start 00000210 T _etext 00800060 B __bss_end 00800060 B __bss_start 00800060 D __data_end 00800060 D __data_start 00800060 D _edata 00800060 ? _end 00810000 ? __eeprom_end